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LT1999-10/LT1999-20/ LT1999-50 High Voltage, Bidirectional Current Sense Amplifier FEATURES
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DESCRIPTION
The LT(R)1999 is a high speed precision current sense amplifier, designed to monitor bidirectional currents over a wide common mode range. The LT1999 is offered in three gain options: 10V/V, 20V/V, and 50V/V. The LT1999 senses current via an external resistive shunt and generates an output voltage, indicating both magnitude and direction of the sensed current. The output voltage is referenced halfway between the supply voltage and ground, or an external voltage can be used to set the reference level. With a 2MHz bandwidth and a common mode input range of -5V to 80V, the LT1999 is suitable for monitoring currents in H-Bridge motor controls, switching power supplies, solenoid currents, and battery charge currents from full charge to depletion. The LT1999 operates from an independent 5V supply and draws 1.55mA. A shutdown mode is provided for minimizing power consumption. The LT1999 is available in an 8-lead MSOP or SOP package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
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Buffered Output with 3 Gain Options: 10V/V, 20V/V, 50V/V Gain Accuracy: 0.5% Max Input Common Mode Voltage Range: -5V to 80V AC CMRR > 80dB at 100kHz Input Offset Voltage: 1.5mV Max -3dB Bandwidth: 2MHz Smooth, Continuous Operation Over Entire Common Mode Range 4kV HBM Tolerant and 1kV CDM Tolerant Low Power Shutdown <10A -55C to 150C Operating Temperature Range 8-Lead MSOP and 8-Lead SO (Narrow) Packages
APPLICATIONS
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High Side or Low Side Current Sensing H-Bridge Motor Control Solenoid Current Sense High Voltage Data Acquisition PWM Control Loops Fuse/MOSFET Monitoring
TYPICAL APPLICATION
VS 5V 1 V+ SHDN LT1999 V+ 2A 8 RG
Full Bridge Armature Current Monitor
VOUT 2.5V V+IN (20V/DIV) VOUT (2V/DIV)
RS V-IN 3 5V 4 0.1F
V
+
0.8k 0.8k
4k V+
+ -
V+IN 2
4k
+ -
VSHDN
7 V
+
VOUT
V+IN
160k 6 160k 5
VREF 0.1F
TIME (10s/DIV)
1999 TA01b
1999 TA01a
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LT1999-10/LT1999-20/ LT1999-50 ABSOLUTE MAXIMUM RATINGS
(Note 1)
Differential Input Voltage +IN to -IN (Notes 1, 3) ................................. 60V, 10ms +IN to GND, -IN to GND (Note 2) ............. -5.25V to 88V Total Supply Voltage (V+ to GND)................................6V Input Voltage Pins 6 and 8 ................... V+ + 0.3V, -0.3V Output Short-Circuit Duration (Note 4) ............ Indefinite Operating Ambient Temperature (Note 5) LT1999C ..............................................-40C to 85C LT1999I................................................-40C to 85C LT1999H ............................................ -40C to 125C LT1999MP ......................................... -55C to 150C
Specified Temperature Range (Note 6) LT1999C .................................................. 0C to 70C LT1999I................................................-40C to 85C LT1999H ............................................ -40C to 125C LT1999MP ......................................... -55C to 150C Junction Temperature ........................................... 150C Storage Temperature Range .................. -65C to 150C
PIN CONFIGURATION
TOP VIEW TOP VIEW V+ +IN -IN V+ 1 2 3 4 8 7 6 5 SHDN OUT REF GND V+ 1 8 7 6 5 SHDN OUT REF GND +IN 2 -IN 3 V+ 4
MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150C, JA = 300C/W
S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150C, JA = 190C/W
ORDER INFORMATION
LEAD FREE FINISH LT1999CMS8-10#PBF LT1999IMS8-10#PBF LT1999HMS8-10#PBF LT1999MPMS8-10#PBF LT1999CS8-10#PBF LT1999IS8-10#PBF LT1999HS8-10#PBF LT1999MPS8-10#PBF LT1999CMS8-20#PBF LT1999IMS8-20#PBF LT1999HMS8-20#PBF LT1999MPMS8-20#PBF TAPE AND REEL LT1999CMS8-10#TRPBF LT1999IMS8-10#TRPBF LT1999HMS8-10#TRPBF LT1999MPMS8-10#TRPBF LT1999CS8-10#TRPBF LT1999IS8-10#TRPBF LT1999HS8-10#TRPBF LT1999MPS8-10#TRPBF LT1999CMS8-20#TRPBF LT1999IMS8-20#TRPBF LT1999HMS8-20#TRPBF LT1999MPMS8-20#TRPBF PART MARKING* LTFPB LTFPB LTFPB LTFQP 199910 199910 199910 99MP10 LTFNZ LTFNZ LTFNZ LTFQQ PACKAGE DESCRIPTION 8-Lead Plastic MSOP 8-Lead Plastic MSOP 8-Lead Plastic MSOP 8-Lead Plastic MSOP 8-Lead Plastic SO 8-Lead Plastic SO 8-Lead Plastic SO 8-Lead Plastic SO 8-Lead Plastic MSOP 8-Lead Plastic MSOP 8-Lead Plastic MSOP 8-Lead Plastic MSOP SPECIFIED TEMPERATURE RANGE 0C to 70C -40C to 85C -40C to 125C -55C to 150C 0C to 70C -40C to 85C -40C to 125C -55C to 150C 0C to 70C -40C to 85C -40C to 125C -55C to 150C
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LT1999-10/LT1999-20/ LT1999-50 ORDER INFORMATION
LEAD FREE FINISH LT1999CS8-20#PBF LT1999IS8-20#PBF LT1999HS8-20#PBF LT1999MPS8-20#PBF LT1999CMS8-50#PBF LT1999IMS8-50#PBF LT1999HMS8-50#PBF LT1999MPMS8-50#PBF LT1999CS8-50#PBF LT1999IS8-50#PBF LT1999HS8-50#PBF LT1999MPS8-50#PBF TAPE AND REEL LT1999CS8-20#TRPBF LT1999IS8-20#TRPBF LT1999HS8-20#TRPBF LT1999MPS8-20#TRPBF LT1999CMS8-50#TRPBF LT1999IMS8-50#TRPBF LT1999HMS8-50#TRPBF LT1999MPMS8-50#TRPBF LT1999CS8-50#TRPBF LT1999IS8-50#TRPBF LT1999HS8-50#TRPBF LT1999MPS8-50#TRPBF PART MARKING* 199920 199920 199920 99MP20 LTFPC LTFPC LTFPC LTFQR 199950 199950 199950 99MP50 PACKAGE DESCRIPTION 8-Lead Plastic SO 8-Lead Plastic SO 8-Lead Plastic SO 8-Lead Plastic SO 8-Lead Plastic MSOP 8-Lead Plastic MSOP 8-Lead Plastic MSOP 8-Lead Plastic MSOP 8-Lead Plastic SO 8-Lead Plastic SO 8-Lead Plastic SO 8-Lead Plastic SO SPECIFIED TEMPERATURE RANGE 0C to 70C -40C to 85C -40C to 125C -55C to 150C 0C to 70C -40C to 85C -40C to 125C -55C to 150C 0C to 70C -40C to 85C -40C to 125C -55C to 150C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
The l denotes the specifications which apply over the full operating temperature range, 0C < TA < 70C for C-grade parts, -40C < TA < 85C for I-grade parts, and -40C < TA < 125C for H-grade parts, otherwise specifications are at TA = 25C. V+ = 5V, GND = 0V, VCM = 12V, VREF = floating, VSHDN = floating, unless otherwise specified. See Figure 2.
SYMBOL VSENSE VCM RIN(DIFF) RINCM VOSI VOSI /T AV AV Error IB IOS PSRR PARAMETER Full-Scale Input Sense Voltage (Note 7) VSENSE = V+IN - V-IN CM Input Voltage Range Differential Input Impedance CM Input Impedance Input Referred Voltage Offset
l
ELECTRICAL CHARACTERISTICS
CONDITIONS LT1999-10 LT1999-20 LT1999-50 VINDIFF = 2V/Gain VCM = 5.5V to 80V VCM = -5V to 4.5V
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MIN -0.35 -0.2 -0.08 -5 6.4 5 3.6 -750 -1500 9.95 19.9 48.75 -0.5 100 -2.35 -1 -10 -2.5 68
TYP
MAX 0.35 0.2 0.08 80
UNITS V V V V k M k V V V/C V/V V/V V/V % A mA A A A A dB
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8 20 4.8 500 5
9.6 6 750 1500 10.05 20.1 50.25 0.5 175 -1.5 2.5 1 10 2.5
Input Referred Voltage Offset Drift Gain LT1999-10 LT1999-20 LT1999-50 VOUT = 2V VCM > 5.5V VCM = -5V VSHDN = 0.5V, 0V < VCM < 80V VCM > 5.5V VCM = -5V VSHDN = 0.5V, 0V < VCM < 80V V+ = 4.5V to 5.5V
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10 20 50 0.2 137.5 -1.95 0.001
Gain Error Input Bias Current I(+IN) = I(-IN) (Note 8) Input Offset Current IOS = I(+IN) - I(-IN) (Note 8) Supply Rejection Ratio
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LT1999-10/LT1999-20/ LT1999-50 ELECTRICAL CHARACTERISTICS
SYMBOL CMRR PARAMETER Sense Input Common Mode Rejection
The l denotes the specifications which apply over the full operating temperature range, 0C < TA < 70C for C-grade parts, -40C < TA < 85C for I-grade parts, and -40C < TA < 125C for H-grade parts, otherwise specifications are at TA = 25C. V+ = 5V, GND = 0V, VCM = 12V, VREF = floating, VSHDN = floating, unless otherwise specified. See Figure 2.
CONDITIONS VCM = -5V to 80V VCM = -5V to 5.5V VCM = 12V, 7VP-P, f = 100kHz, VCM = 0V, 7VP-P, f = 100kHz f = 10kHz f = 0.1Hz to 10Hz LT1999-10 LT1999-20 LT1999-50 VSHDN = 0.5V VSHDN = 0.5V LT1999-10 LT1999-20 LT1999-50 V+ = 5.5V, VSHDN = 0V
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MIN 96 96 75 80
TYP 105 120 90 100 97 8
MAX
UNITS dB dB dB dB nV/Hz VP-P dB dB dB
en REFRR
Differential Input Referred Noise Voltage Density REF Pin Rejection, V+ = 5.5V VREF = 3.0V VREF = 3.25V VREF = 3.25V REF Pin Input Impedance Open Circuit Voltage REF Pin Input Range (Note 9)
62 62 62 60 0.15 2.45 1 1.25 1.125 1.125 -6 V+ - 0.5
70 70 70 80 0.4 2.5 2.5 100 0.65 2.55 2.75 V+ - 1.25 V+ - 1.125 V+ - 1.125 -2 0.5 2 2 1.2 3 2.5 0.8 1 1.3
RREF VREF VREFR ISHDN VIH VIL f3dB SR ts tr VS IS RO ISRC ISNK VOUT
k M V V V V V A V V MHz MHz MHz V/s s s s s
Pin Pull-Up Current SHDN Pin Input High SHDN Pin Input Low Small Signal Bandwidth
LT1999-10 LT1999-20 LT1999-50 0.5% Settling LT1999-10 LT1999-20 LT1999-50
l
Slew Rate Settling Time due to Input Step, VOUT = 2V Common Mode Step Recovery Time VCM = 50V, 20ns (Note 10) Supply Voltage (Note 11) Supply Current VCM > 5.5V VCM = -5V V+ = 5.5V, VSHDN = 0.5V, VCM > 0V IO = 2mA RLOAD = 50 to GND RLOAD = 50 to V+ RLOAD = 1k to Mid-Supply RLOAD = Open RLOAD = 1k to Mid-Supply RLOAD = Open VSHDN = 0V to 5V VSHDN = 5V to 0V
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4.5
5 1.55 5.8 3 0.15
5.5 1.9 7.1 10 40 40 250 125 250 225
V mA mA A mA mA mV mV mV mV s s
l l l
Output Impedance Sourcing Output Current Sinking Output Current Swing Output High (with Respect to V+) Swing Output Low (with Respect to V-)
6 15
31 26 125 5 175 150 1 1
tON tOFF
Turn-On Time Turn-Off Time
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LT1999-10/LT1999-20/ LT1999-50 ELECTRICAL CHARACTERISTICS
SYMBOL VSENSE VCM RIN(DIFF) RINCM VOSI VOSI /T AV AV Error IB IOS PSRR CMRR PARAMETER Full-Scale Input Sense Voltage (Note 7) VSENSE = V+IN - V-IN CM Input Voltage Range Differential Input Impedance CM Input Impedance Input Referred Voltage Offset
l
The l denotes the specifications which apply over the full operating temperature range, -55C < TA < 150C for MP-grade parts, otherwise specifications are at TA = 25C. V+ = 5V, GND = 0V, VCM = 12V, VREF = floating, VSHDN = floating, unless otherwise specified. See Figure 2.
CONDITIONS LT1999-10 LT1999-20 LT1999-50 VINDIFF = 2V/GAIN VCM = 5.5V to 80V VCM = -5V to 4.5V
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MIN -0.35 -0.2 -0.08 -5 6.4 5 3.6 -750 -2000 9.95 19.9 48.75 -0.5 100 -2.35 -1 -10 -10 68 96 96 75 80
TYP
MAX 0.35 0.2 0.08 80
UNITS V V V V k M k V V V/C V/V V/V V/V % A mA A A A A dB dB dB dB dB nV/Hz VP-P dB dB dB
8 20 4.8 500 8
9.6 6 750 2000 10.05 20.1 50.25 0.5 180 -1.5 10 1 10 10
Input Referred Voltage Offset Drift Gain LT1999-10 LT1999-20 LT1999-50 VOUT = 2V VCM > 5.5V VCM = -5V VSHDN = 0.5V, 0V < VCM < 80V VCM > 5.5V VCM = -5V VSHDN = 0.5V, 0V < VCM < 80V V+ = 4.5V to 5.5V VCM = -5V to 80V VCM = -5V to 5.5V VCM = 12V, 7VP-P, f = 100kHz, VCM = 0V, 7VP-P, f = 100kHz f= 10kHz f = 0.1Hz to 10Hz LT1999-10 LT1999-20 LT1999-50 VSHDN = 0.5V VSHDN = 0.5V LT1999-10 LT1999-20 LT1999-50 V+ = 5.5V, VSHDN = 0V
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10 20 50 0.2 137.5 -1.95 0.001
Gain Error Input Bias Current I(+IN) = I(-IN) (Note 8) Input Offset Current IOS = I(+IN) - I(-IN) (Note 8) Supply Rejection Ratio Sense Input Common Mode Rejection
77 105 120 90 100 97 8
en REFRR
Differential Input Referred Noise Voltage Density REF Pin Rejection, V+ = 5.5V VREF = 2.75V VREF = 3.25V VREF = 3.25V REF Pin Input Impedance Open Circuit Voltage REF Pin Input Range (Note 9)
62 62 62 60 0.15 2.45 0.25 1.5 1.125 1.125 -6 V+ - 0.5
70 70 70 80 0.4 2.5 2.5 100 0.65 2.55 2.75 V+ - 1.25 V+ - 1.125 V+ - 1.125 -2 0.5 2 2 1.2 3 2.5
RREF VREF VREFR ISHDN VIH VIL f3dB SR tS
k M V V V V V A V V MHz MHz MHz V/s s
Pin Pull-Up Current SHDN Pin Input High SHDN Pin Input Low Small Signal Bandwidth
LT1999-10 LT1999-20 LT1999-50 0.5% Settling
Slew Rate Settling Time Due to Input Step, VOUT = 2V
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LT1999-10/LT1999-20/ LT1999-50
The l denotes the specifications which apply over the full operating temperature range, -55C < TA < 150C for MP-grade parts, otherwise specifications are at TA = 25C. V+ = 5V, GND = 0V, VCM = 12V, VREF = floating, VSHDN = floating, unless otherwise specified. See Figure 2.
SYMBOL tr VS IS RO ISRC ISNK VOUT PARAMETER Common Mode Step Recovery Time VCM = 50V, 20ns (Note 10) Supply Voltage (Note 11) Supply Current VCM > 5.5V VCM = -5V V+ = 5.5V, VSHDN = 0.5V, VCM > 0V IO = 2mA RLOAD = 50 to GND RLOAD = 50 to V+ RLOAD = 1k to Mid-Supply RLOAD = Open RLOAD = 1k to Mid-Supply RLOAD = Open VSHDN = 0V to 5V VSHDN = 5V to 0V
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ELECTRICAL CHARACTERISTICS
CONDITIONS LT1999-10 LT1999-20 LT1999-50
l l l l
MIN
TYP 0.8 1 1.3
MAX
UNITS s s s
4.5
5 1.55 5.8 3 0.15
5.5 1.9 7.1 25 40 40 250 125 250 225
V mA mA A mA mA mV mV mV mV s s
Output Impedance Sourcing Output Current Sinking Output Current Swing Output High (with Respect to V+) Swing Output Low (with Respect to V -)
3 10
31 26 125 5 175 150 1 1
tON tOFF
Turn-On Time Turn-Off Time
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Pin 2 (+IN) and Pin 3 (-IN) are protected by ESD voltage clamps which have asymmetric bidirectional breakdown characteristics with respect to the GND pin (Pin 5). These pins can safely support common mode voltages which vary from -5.25V to 88V without triggering an ESD clamp. Note 3: Exposure to differential sense voltages exceeding the normal operating range for extended periods of time may degrade part performance. A heat sink may be required to keep the junction temperature below the Absolute Maximum Rating when the inputs are stressed differentially. The amount of power dissipated in the LT1999 due to input overdrive can be approximated by: 8k Note 4: A heat sink may be required to keep the junction temperature below the absolute maximum rating. Note 5: The LT1999C/LT1999I are guaranteed functional over the operating temperature range -40C to 85C. The LT1999H is guaranteed functional over the operating temperature range -40C to 125C. The LT1999MP is guaranteed functional over the operating temperature range -55C to 150C. Junction temperatures greater than 125C will promote accelerated aging. The LT1999 has a demonstrated typical life beyond 1000 hours at 150C. Note 6: The LT1999C is guaranteed to meet specified performance from 0C to 70C. The LT1999C is designed, characterized, and expected to meet specified performance from -40C to 85C but is not tested or QA sampled at these temperatures. The LT1999I is guaranteed to meet specified performance from -40C to 85C. The LT1999H is guaranteed to meet specified performance from -40C to 125C. The LT1999MP is guaranteed to meet specified performance from -55C to 150C. PDISS =
( V+IN - V-IN )2
Note 7: Full-scale sense (VSENSE) gives indication of the maximum differential input that can be applied with better than 0.5% gain accuracy. Gain accuracy is degraded when the output saturates against either power supply rail. VSENSE is verified with V+ = 5.5V, VCM = 12V, with the REF pin set to it's voltage range limits. The maximum VSENSE is verified with the REF pin set to it's minimum specified limit, verifying the gain error is less than 0.5% at the output. The minimum VSENSE is verified with the REF pin set to its maximum specified limit, verifying the gain error at the output is less than 0.5%. See Note 9 for more information. Note 8: IB is defined as the average of the input bias currents to the +IN and -IN pins (Pins 2 and 3). A positive current indicates current flowing into the pin. IOS is defined as the difference of the input bias currents. IOS = I(+IN) - I(-IN) Note 9: The REF pin voltage range is the minimum and maximum limits that ensures the input referred voltage offset does not exceed 3mV over the I, C, and H temperature ranges, and 3.5mV over the MP temperature range. Note 10: Common mode recovery time is defined as the time it takes the output of the LT1999 to recover from a 50V, 20ns input common mode voltage transition, and settle to within the DC amplifier specifications. Note 11: Operating the LT1999 with V+ < 4.5V is possible, although the LT1999 is not tested or specified in this condition. See the Applications Information section.
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LT1999-10/LT1999-20/ LT1999-50 TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Input Common Mode
7 6 5 IS (mA) IS (mA) 4 3 2 1 0 -5 5 15 25 35 45 VCM (V) 55 65 75 80
1999 G01
Supply Current vs Temperature
1.8 VSHDN = OPEN VINDIFF = 0V VCM = 12V 4.0 3.5 3.0 2.5 1.6 V+ = 5.5V 1.5 V+ = 4.5V IS (mA) 2.0 1.5 1.0 0.5 1.4 -55 -30 -5 20 45 70 95 TEMPERATURE (C) 120 145
1999 G02
Supply Current vs Supply Voltage
150C 130C 90C 25C -45C -55C VCM = 12V
V+ = 5V
1.7
0
0
1
2 3 SUPPLY VOLTAGE (V)
4
5
1999 G03
Supply Current vs SHDN Pin Voltage
10 V+ = 5V VCM = 12V 10
Shutdown Supply Current vs Temperature
VSHDN = 0V VINDIFF = 0V VCM = 12V 1000
Shutdown Input Bias Current vs Input Common Mode
V+ = 5V VSHDN = 0V VSENSE = 0V TA = 150C TA =130C TA =110C
1
8
100 IS (mA) IS (A) 0.1 TA = 150C IB (nA) 6 V+ = 5.5V V+ = 4.5V
4
10 0.01 TA = 25C 0 1 TA = -55C 4 5
1999 G04
TA = 90C TA = 70C
2
0.001
3 2 VSHDN (V)
0 -55 -30
-5
20 45 70 95 TEMPERATURE (C)
120 145
1999 G05
1
0
20
60 40 VCM (V)
80
100
1999 G06
Input Bias Current vs Input Common Mode
0.5 V+ = 5V 146
Input Bias Current vs Temperature
VSHDN = OPEN VINDIFF = 0V 144 V+ = 5V 142 100000
Input Impedance vs Input Common Mode Voltage
0
10000 VCM = 80V IMPEDANCE (k )
COMMON MODE INPUT IMPEDANCE
IB (mA)
IB (A)
-0.5
140 138 136
1000
-1.0
VCM = 5.5V
100 DIFFERENTIAL INPUT IMPEDANCE
-1.5
134 -5 5 15 25 35 45 VCM (V) 55 65 75 80
1999 G07
10
-2.0
132 -55 -30
-5
20 45 70 95 TEMPERATURE (C)
120 145
1999 G08
1
-5
5
15
25
35 45 VCM (V)
55
65
75
1999 G09
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LT1999-10/LT1999-20/ LT1999-50 TYPICAL PERFORMANCE CHARACTERISTICS
Input Referred Voltage Offset vs Temperature and Gain Option
1500 1000 500 VOSI (V) VOSI (V) 0 -500 -1000 -1500 -55 -30 LT1999-10 LT1999-20 LT1999-50 -5 20 45 70 95 TEMPERATURE (C) 120 145
1999 G10
Input Referred Voltage Offset vs Input Common Mode Voltage
1500 1000 500 0 -500 -1000 -1500 LT1999-10 LT1999-20 LT1999-50 -5 5 15 25 35 45 VCM (V) 55 65 75
1999 G11
VCM = 12V 12 UNITS PLOTTED
V+ = 5V TA = 25C 12 UNITS PLOTTED
LT1999-10 Small Signal Frequency Response
30 25 20 GAIN (dB) 15 10 5 0 -5 -10 VOUT = 0.5VP-P AT 1kHz 1 10 100 1000 FREQUENCY (kHz) PHASE GAIN 180 135 90 GAIN (dB) 45 0 -45 -90 -135 -180 10000
1999 G12
LT1999-20 Small Signal Frequency Response
35 30 25 20 15 10 5 0 -5 VOUT = 0.5VP-P AT 1kHz 1 10 100 1000 FREQUENCY (kHz) PHASE PHASE (DEG) GAIN 180 135 90 45 0 -45 -90 -135 -180 10000
1999 G13
LT1999-50 Small Signal Frequency Response
40 35 30 GAIN (dB) 25 20 15 10 5 0 VOUT = 0.5VP-P AT 1kHz 1 10 100 1000 FREQUENCY (kHz) PHASE GAIN 180 135 90 45 0 -45 -90 -135 -180 10000
1999 G14
Gain Error vs Temperature
0.50 VCM = 12V 12 UNITS PLOTTED 0.50
Gain Error vs Input Common Mode Voltage
V+ = 5V TA = 25C 12 UNITS PLOTTED
PHASE (DEG)
0.25 GAIN ERROR (%) GAIN ERROR (%) LT1999-10 LT1999-20 LT1999-50 -5 20 45 70 95 TEMPERATURE (C) 120 145
1999 G15
0.25
PHASE (DEG)
0
0
-0.25
-0.25 LT1999-10 LT1999-20 LT1999-50 -5 5 15 25 35 45 VCM (V) 55 65 75
1999 G16
-0.50 -55 -30
-0.50
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LT1999-10/LT1999-20/ LT1999-50 TYPICAL PERFORMANCE CHARACTERISTICS
LT1999-10 Pulse Response
VSENSE VSENSE (0.5V/DIV) VSENSE (0.2V/DIV)
LT1999-20 Pulse Response
VSENSE VSENSE (0.1V/DIV)
LT1999-50 Pulse Response
VSENSE
VOUT (1V/DIV)
VOUT (1V/DIV)
VOUT (1V/DIV)
VOUT
VOUT
VOUT
TIME (2s/DIV)
1999 G17
TIME (2s/DIV)
1999 G18
TIME (2s/DIV)
1999 G19
LT1999-10 2V Step Response Settling Time
4.5 4.0 3.5 VOUT (V) 3.0 2.5 2.0 1.5 1.0 0.5 TIME (1s/DIV)
1999 G20
LT1999-20 2V Step Response Settling Time
0.100 4.5 4.0 3.5 OUTPUT ERROR (V) VOUT (V) 3.0 2.5 2.0 1.5 1.0 0.5 -1 0 1 2 3456 TIME (1s/DIV) 7 8 9 10
1999 G21
0.20 0.15 VOUT 0.10 OUTPUT ERROR (V) 0.05 0 -0.05 OUTPUT ERROR -0.01 -0.15 -0.20
VOUT
0.075 0.050 0.025 0
OUTPUT ERROR
-0.025 -0.050 -0.075 -0.100
LT1999-50 2V Step Response Settling Time
4.5 4.0 3.5 VOUT (V) 3.0 2.5 2.0 1.5 1.0 0.5 TIME (1s/DIV)
1999 G22
CMRR vs Frequency
0.500 0.375 120 100 OUTPUT ERROR (V) 80 CMRR (dB) CMRR (dB) 60 40 VCM = 12V 20 V+ = 5V TA = 25C 6 UNITS PLOTTED 0 1000 1 10 100 FREQUENCY (kHz) LT1999-10 LT1999-20 LT1999-50 120 100 80 60 40 20 0
CMRR vs Frequency
LT1999-10 LT1999-20 LT1999-50
VOUT
0.250 0.125 0 -0.125
OUTPUT ERROR
-0.250 -0.375 -0.500
VCM = 0V V+ = 5V TA = 25C 6 UNITS PLOTTED 1 10 100 1000 FREQUENCY (kHz) 10000
1999 G24
10000
1999 G23
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LT1999-10/LT1999-20/ LT1999-50 TYPICAL PERFORMANCE CHARACTERISTICS
LT1999-10 Common Mode Rising Edge Step Response
VCM , tRISE 20ns VCM , tFALL 20ns VOUT (0.5V/DIV) VOUT (0.5V/DIV) VCM (25V/DIV) VCM (25V/DIV)
LT1999-10 Common Mode Falling Edge Step Response
VOUT
VOUT
TIME (0.5s/DIV)
1999 G25
TIME (0.5s/DIV)
1999 G26
LT1999-20 Common Mode Rising Edge Step Response
VCM , tRISE 20ns
LT1999-20 Common Mode Falling Edge Step Response
VOUT (0.5V/DIV)
VOUT (0.5V/DIV)
VCM , tFALL 20ns
VCM (25V/DIV)
VCM (25V/DIV)
VOUT
VOUT
TIME (0.5s/DIV)
1999 G27
TIME (0.5s/DIV)
1999 G28
LT1999-50 Comm Step Response
LT1999-50 Common Mode Rising Edge Step Response
VCM , tRISE 20ns
LT1999-50 Common Mode Falling Edge Step Response
VOUT (0.5 V / div)
VCM tRISE 20ns
VOUT (0.5V/DIV)
VOUT (0.5V/DIV)
VCM , tFALL 20ns
VCM (25V/DIV)
VCM (25V/DIV)
VOUT
VOUT
TIM
TIME (0.5s/DIV)
1999 G29
TIME (0.5s/DIV)
1999 G30
1999fa
10
LT1999-10/LT1999-20/ LT1999-50 TYPICAL PERFORMANCE CHARACTERISTICS
LT1999 Input Referred Noise Density vs Frequency
1000 40 30 NOISE DENSITY (nV/Hz) 20 ISC (mA) 10 0 -10 -20 -30 10 0.001 0.01 0.1 1 10 FREQUENCY (kHz) 1000 10000
1999 G31
Short-Circuit Current vs Temperature
3.0 SINKING REF PIN VOLTAGE (V) 2.5 2.0 1.5 1.0 0.5
REF Open Circuit Voltage vs Temperature
ACTIVE MODE SHDN MODE
100
SOURCING
-40 -55 -30
-5
20 45 70 95 TEMPERATURE (C)
120 145
1999 G32
V+ = 5V 0 -55 -30 -5
20 45 70 95 TEMPERATURE (C)
120 145
1999 G33
SHDN Pin Current vs SHDN Pin Voltage and Temperature
0 V+ = 5V VCM = 12V
Turn-On/Turn-Off Time vs SHDN Voltage
VCM = 12V IS IS (1mA/DIV) SHDN PIN VOLTAGE (5V/DIV)
-1 TA = 150C ISHDN (A) -2 TA = 25C TA = -55C -3 VSHDN -4
SHUTDOWN
0
1
2 3 VSHDN (V)
4
5
1999 G34
TIME (1s/DIV)
1999 G35
6 5 4 VOUT (V)
VOUT vs VSENSE
VREF = 2.5V
VOUT vs VSENSE Over the Sense ABSMAX Range
6 5 4 VOUT (V) LT1999-10 LT1999-20 LT1999-50 3 2 1 0 VREF = 2.5V -1 -60 -30 0 VSENSE (V) LT1999-10 LT1999-20 LT1999-50 30 60
1999 G37
VOUT PHASE REVERSAL FOR VSENSE < -25V
3 2 1 0 -1 -0.25 -0.15 0.05 -0.05 VSENSE (V)
0.15
0.25
1999 G36
1999fa
11
LT1999-10/LT1999-20/ LT1999-50 PIN FUNCTIONS
V+ (Pins 1, 4): Power Supply Voltage. Pins 1 and 4 are tied internally together. The specified range of operation is 4.5V to 5.5V, but lower supply voltages (down to approximately 4V) is possible although the LT1999 is not tested or characterized below 4.5V. See the Applications Information section. +IN (Pin 2): Positive Sense Input Pin. -IN (Pin 3): Negative Sense Input Pin. GND (Pin 5): Ground Pin. REF (Pin 6): Reference Pin Input. The REF pin sets the output common mode level and is set halfway between V+ and GND using a divider made of two 160k resistors. The default open circuit potential of the REF pin is mid-supply. It can be overdriven by an external voltage source cable of driving 80k to a mid-supply potential (see the Electrical Characteristics table for its specified input voltage range). OUT (Pin 7): Voltage Output. VOUT = AV *(VSENSE VOSI), where AV is the gain, and VOSI is the input referred offset voltage. The output amplifier has a low impedance output and is designed to drive up to 200pF capacitive loads directly. Capacitive loads exceeding 200pF should be decoupled with an external resistor of at least 100. SHDN (Pin 8): Shutdown Pin. When pulled to within 0.5V of GND (Pin 5), will place the LT1999 into low power shutdown. If the pin is left floating, an internal 2A pullup current source will place the LT1999 into the active (amplifying) state.
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12
LT1999-10/LT1999-20/ LT1999-50 BLOCK DIAGRAM
V+ V+ 1 R +IN 2 +IN 2k 2k CF 4pF 3 -IN 2k R -IN V+ 4 GND 5 2k V(G+IN) V(G-IN) 0.8k R +S 0.8k R -S SHDN 2A 4.5k 8
V+ D1
300
Figure 1. Simplified Block Diagram
TEST CIRCUIT
LT1999 5V 1 V+ SHDN V+ 2A 8V SHDN RG
+ -
VCM
+
VIN(DIFF)
V
+
0.8k 0.8k
+ -
+ -
-
5V
3 V+ 4
4k
0.1F
1999 F02
Figure 2. Test Circuit
+ -
2
4k
+ -
V+ 160k 6 160k 5 VREF
+ -
+ GIN -
RG
AO V+ 160k
OUT
7
REF 160k
6
1999 BD
7V OUT
0.1F
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13
LT1999-10/LT1999-20/ LT1999-50 APPLICATIONS INFORMATION
The LT1999 current sense amplifier provides accurate bidirectional monitoring of current through a user-selected sense resistor. The voltage generated by the current flowing in the sense resistor is amplified by a fixed gain of 10V/V, 20V/V or 50V/V (LT1999-10, LT1999-20, or LT1999-50 respectively) and is level shifted to the OUT pin. The voltage difference and polarity of the OUT pin with respect to REF (Pin 6) indicates magnitude and direction of the current in the sense resistor. THEORY OF OPERATION Refer to the Block Diagram (Figure 1). Case 1: V+ < VCM < 80V For input common mode voltages exceeding the power supply, one can assume D1 of Figure 1 is completely off. The sensed voltage (VSENSE) is applied across Pin 2 (+IN) and Pin 3 (-IN) to matched resistors R+IN and R- IN (nominally 4k each). The opposite ends of R+IN and R- IN are forced to equal potentials by transconductor GIN, which convert the differentially sensed voltage into a sensed current. The sensed current in R+IN and R- IN is combined, level-shifted, and converted back into a voltage by transresistance amplifier AO and resistor RG. Amplifier AO provides high open loop gain to accurately convert the sensed current back into a voltage and to drive external loads. The theoretical output voltage is determined by the sensed voltage (VSENSE), and the ratio of two on-chip resistors: VOUT - VREF = VSENSE * where RIN = R +IN + R -IN nominally 4k 2 RG RIN The voltage difference between the OUT pin and the REF pin represent both polarity and magnitude of the sensed voltage. The noninverting input of amplifier AO is biased by a resistive 160k to 160k divider tied between V+ and GND to set the default REF pin bias to mid-supply. Case 2: -5V < VCM < V+ For common mode inputs which transition or are set below the supply voltage, diode D1 will turn on and will provide a source of current through R+S and R -S to bias the inputs of transconductance amplifier GIN at least 2.25V above GND. The transition is smooth and continuous; there are negligible changes to either gain or amplifier voltage offset. The only difference in amplifier operation is the bias currents provided by D1 through R+S and R- S are steered through the input pins, otherwise amplifier operation is identical. The inputs to transconductance amplifier GIN are still forced to equal potentials forcing any differential voltages appearing at the +IN and -IN pins into a differential current. This differential current is combined, level-shifted, and converted back into a voltage by transresistance amplifier AO and Resistor RG. Resistors R+S and R- S are trimmed to match R+IN and R- IN respectively, to prevent common mode to differential conversion from occurring (to the extent of the matched trim) when the input common mode transitions below V+. As described in case 1, the output is determined by the sense voltage and the ratio of two on-chip resistors: VOUT - VREF = VSENSE * where RIN = R +IN + R -IN 2 RG RIN
For the LT1999-10, RG is nominally 40k. For the LT1999-20, RG is nominally 80k, and for the LT1999-50, RG is nominally 200k.
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LT1999-10/LT1999-20/ LT1999-50 APPLICATIONS INFORMATION
Input Common Mode Range The LT1999 was optimized for high common mode rejection. Its input stage is balanced and fully differential, designed to amplify differential signals and reject common mode signals. There is negligible crossover distortion due to sense voltage reversals. The amplifier is most linear in the zero-sense region. With the V+ supply configured within the specified and tested range (4.5V < V+ < 5.5V), the LT1999's common mode range extends from -5V to 80V. Pushing +IN and -IN beyond the limits specified in the Absolute Maximum table can turn on the voltage clamps designed to protect the +IN and -IN pins during ESD events. It is possible to operate the LT1999 on power supplies as low as 4V (although it is not tested or specified below 4.5V). Operating the LT1999 on supplies below 4V will produce erratic behavior. When operating the LT1999 with supplies as low as 4V, the common mode range for inputs which extend below GND is reduced. Refer to the Block Diagram (Figure 1). For inputs driven below V+, diode D1 conducts. For proper operation, the input to the transconductor V(G+IN) must be biased at approximately 2.25V above the GND pin. V(G+IN) sits on the centertap of a voltage divider comprised of R+S and R+IN V(G -IN) likewise sits in the middle of the voltage divider comprised of R - S , and R-IN). The voltage on V(G+IN) input is given by the following equation: R +S R +IN V(G +IN) = V +IN * + V + -VD1 * R +S + R +IN R +S + R +IN
-2.0 -2.5 VCM(LOWER LIMIT) (V) -3.0 -3.5 -4.0 -4.5 -5.0 -5.5 -6.0 4 4.25 BELOW GROUND INPUT COMMON MODE RANGE LIMITED BY ESD CLAMPS BELOW GROUND INPUT COMMON MODE RANGE LIMITED BY V+ SUPPLY VOLTAGE
TYPICAL ESD CLAMP VOLTAGE 4.5 5 4.75 SUPPLY VOLTAGE (V) 5.25 5.5
1999 F03
Figure 3. Lower Input Common Mode vs Supply Voltage
Output Common Mode Range The LT1999's output common mode level is set by the voltage on the REF pin. The REF pin sits in the middle of a 160k to 160k voltage divider connected between V+ and GND which sets the default open circuit potential of the REF pin to mid-supply. It can be overdriven by an external voltage source capable of driving 80k tied to a mid-supply potential. See the Electrical Characteristics table for the REF pin's specified input voltage range. Differential sampling of the OUT pin with respect the REF pin provides the best noise immunity. Measurements of the output voltage made differentially with respect to the REF pin will provide the highest power supply and common mode rejection. Otherwise, power supply or GND pin disturbances are divided by the REF pin's voltage divider and appear directly at the noninverting input of the transresistance amplifier AO and are not rejected. If not driven by a low impedance (<100), the REF pin should be filtered with at least 1nF of capacitance to a low impedance, low noise ground plane. This external capacitance will also provide a charge reservoir during high frequency sampling of the REF pin by ADC inputs attached to this pin.
(
)
Setting V(G+IN) = 2.25V, the ratio (R+IN /R+S) to 5, and VD1 equal to 0.8V (cold temperatures), a plot of the lower input common mode range plotted against supply is shown in Figure 3.
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LT1999-10/LT1999-20/ LT1999-50 APPLICATIONS INFORMATION
Shutdown Capability If SHDN (Pin 8) is driven to within 0.5V of GND, the LT1999 is placed into a low power shutdown state in which the part will draw about 3A from the V+ supply. The input pins (+IN and -IN) will draw approximately 1nA if biased within the range of 0V to 80V (with no differential voltage applied). If the input pins are pulled below the GND pin, each input appears as a diode tied to GND in series with approximately 4k of resistance. The REF pin appears as approximately 0.4M tied to a mid-supply potential. The output appears as reverse biased diodes tied between the output to either V+ or GND pins. EMI Filtering and Layout Practices An internal 1st order differential lowpass noise/EMI suppression filter with a -3dB bandwidth of 10MHz (approximately 5x the LT1999's -3dB bandwidth) is included to help improve the LT1999's EMI susceptibility and to assist with the rejection of high frequency signals beyond the bandwidth of the LT1999 that may introduce errors. The pole is set by the following equation: ffilt = 1/(*(R+IN + R-IN)*CF) 10MHz Both the resistors and capacitors have a 15% variation so the pole can vary by approximately 30% over manufacturing process and temperature variations. The layout for lowest EMI/noise susceptibility is achieved by keeping short direct connections and minimizing loop areas (see Figure 4). If the user-supplied sense resistor cannot be placed in close proximity to the LT1999, the surface area of the loop comprising connections of +IN to RSENSE and back to -IN should be minimized. This requires routing PCB traces connecting +IN to RSENSE and -IN to RSENSE adjacent with one another with minimal separation. The metal traces connecting +IN to the sense resistor and -IN to the sense resistor should match and use the same trace width. Bypassing the V+ pin to the GND pin with a 0.1F capacitor with short wiring connection is recommended.
FROM DC SOURCE RSENSE * TO LOAD
1 V+ 2 +IN 3 -IN 4 V+
SHDN 8 OUT 7 REF 6 GND 5 ** DIFFERENTIAL ANALOG OUT
SUPPLY BYPASS CAPACITOR
1999 F03
* KEEP LOOP AREA COMPRISING RSENSE, +IN AND -IN PINS AS SMALL AS POSSIBLE. ** REF BYPASS TIED TO A LOW NOISE, LOW IMPEDANCE SIGNAL GROUND PLANE. OPTIONAL 10pF CAPACITOR TO PREVENT dV/dt EDGES ON INPUT COUPLING TO FLOATING SHDN PIN.
Figure 4. Recommended Layout
1999fa
16
LT1999-10/LT1999-20/ LT1999-50 APPLICATIONS INFORMATION
The REF pin should be either driven by a low source impedance (<100) or should be bypassed with at least 1nF to a low impedance, low noise, signal ground plane (see Figure 4). Larger bypass capacitors on both V+ pins, and the REF pin, will extend enhanced AC CMRR, and PSRR performance to lower frequencies. Bypassing the REF pin to a quiet ground plane filters the V+ pin or GND pin noise that is sensed by the REF pin voltage divider and applied to the noninverting input of output amplifier AO. Any common I*R drops generated by pulsating ground currents in common with the REF pin filter capacitor can compromise the filtering performance and should be avoided. If the SHDN pin is not driven and is left floating, routing a PCB trace connecting Pins 1 and 8 under the part will act as a shield, and will help limit edge coupling from the inputs (Pins 2 and 3) to the SHDN pin. Periodic pulses on the inputs with fast edges may glitch the high impedance SHDN pin, periodically putting the part into low power shutdown. Additional precaution against this may be taken by adding an optional small (~10pF) capacitor may be tied between V+ (Pin 1) and Pin 8. Finally, when connecting the LT1999 inputs to the sense resistor, it is important to use good Kelvin sensing practices (sensing the resistor in a way that excludes PCB trace I*R voltage drops). For sense resistors less than 1, one might consider using a 4-wire sense resistor to sense the resistive element accurately. Selection of the Current Sense Resistor The external sense resistor selection presents a delicate trade-off between power dissipation in the resistor and current measurement accuracy. In high current applications, the user may want to minimize the power dissipated in the sense resistor. The sense resistor current will create heat and voltage loss, degrading efficiency. As a result, the sense resistor should be as small as possible while still providing adequate dynamic range required by the measurement. The dynamic range is the ratio between the maximum accurately produced signal generated by the voltage across the sense resistor, and the minimum accurately reproduced signal. The minimum accurately reproduced signal is primarily dictated by the voltage offset of the LT1999. The maximum accurately reproduced signal is dictated by the output swing of the LT1999. Thus the dynamic range for the LT1999 can be thought of the maximum sense voltage divided by the input referred voltage offset or: Dynamic Range = VOUT(MAX) GAIN * VOSI
The above equation tells us that the dynamic range is inversely proportional to the gain of the LT1999. Thus, if accuracy is of greater importance than efficiency or power loss, the LT1999-10 used with the highest valued sense resistor possible is recommended. If efficiency, heat generated, and power loss in the resistive shunt is the primary concern, the LT1999-50 and the lowest value sense resistor possible is recommended. The LT1999-20 is available for applications somewhere in between these two extremes.
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LT1999-10/LT1999-20/ LT1999-50 APPLICATIONS INFORMATION
Fuse Monitor The inputs can be overdriven without fear of damaging the LT1999. This makes the LT1999 ideal for monitoring fuses if either +IN or -IN are shorted to ground while the other is at the full common mode supply voltage (see Figure 5). If the fuse in Figure 5 opens with the +IN tied to the positive supply, the load will pull -IN to GND. The output will be forced to the positive V+ supply rail. If it is desired that the output be near ground if the fuse opens, it is a simple matter of swapping the inputs. Precautions should be followed: First, when the inputs are stressed differentially due to the fuse blowing open, a large voltage drop will be placed across the +IN to -IN pins, dissipating
VS 5V ON OFF VSHDN ILOAD V+IN 2 VOUT FUSE RSENSE V-IN 3 5V 4 0.1F
1999 F05
power in the precision on-chip input resistors. Precaution should be taken to prevent junction temperatures from exceeding the Absolute Maximum ratings (see Note 3 in the Electrical Characteristics section). Secondly, if the load is inductive, and the fuse blows open without a clamp diode, energy stored in the inductive load will be dissipated in the LT1999, which could cause damage. A simple steering diode as shown in Figure 5 will prevent this from happening, and will protect the LT1999 from damage. Finally, the user should be aware that in fuse monitoring applications with the sense voltage (VSENSE = V+IN - V-IN) being driven in excess of -25V, the output of the LT1999 will undergo phase reversal (see Figure 6).
LT1999 V+ 2A SHDN 8 RG VSHDN
V+ 1
V+
0.8k 0.8k
VREF
4k V+
LOAD
STEERING DIODE
Figure 5. Using the LT1999 to Monitor a Fuse
VOUT PHASE REVERSAL FOR VSENSE < -25V
VOUT (1V/DIV)
VREF = 2.5V -60 -45 -30 -15 0 15 VSENSE (V) 30 45 60
1999 F06
Figure 6. A Plot of the LT1999's Output Voltage vs VSENSE (VSENSE = V+IN - V- IN). In Applications Where the Sense Voltage Is Driven in Excess of -25V, the Output of the LT1999 Will Undergo Phase Reversal
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18
+ -
4k
+ -
7 V+ 160k 6 160k 5
VOUT
VREF 0.1F
LT1999-10/LT1999-20/ LT1999-50 TYPICAL APPLICATIONS
Solenoid Current Monitor The solenoid of Figure 7 consists of a coil of wire in an iron case with permeable plunger that acts as a movable element. When the MOSFET turns on, the diode is reversed biased off, and current flows through RSENSE to actuate the solenoid. If the MOSFET is turned off, the current in the MOSFET is interrupted, but the energy stored in the solenoid causes the diode to turn on and current to freewheel in the loop consisting of the diode, RSENSE and the solenoid. Figure 7 shows the LT1999 monitoring currents in a ground referenced solenoid used when the coil is hard tied to the case, and is tied to ground. Figure 8 shows a supply referenced solenoid whose coil is insulated from the case. The LT1999 will interface equally well to either of these two configurations.
VS OFF ON 5V 1 V+ SHDN LT1999 V+ 2A 8 RG VSHDN
Bidirectional PWM Motor Monitor Pulse width modulation is commonly used to efficiently vary the average voltage applied across a DC motor. The H-bridge topology of Figure 9 allows full 4-quadrant control: clockwise control, counter-clockwise control, clockwise regeneration, and counter-clockwise regeneration. The LT1999 in conjunction with a non-inductive current shunt is used to monitor currents in the rotor. The LT1999 can be used to detect stuck rotors, provide detection of overcurrent conditions in general, or provide current mode feedback control. Figure 10 shows a plot of the output voltage of the LT1999.
V+ RSENSE V-IN 5V SOLENOID 0.1F 4 3 V+ 4k
0.8k 0.8k
VOUT (0.5V/DIV)
Figure 7. Solenoid Current Monitor for Ground Tied Solenoid. The Common Mode Inputs to the LT1999 Switch Between VS and One Diode Drop Below Ground
+ -
V+IN
2
4k
+ -
7 V+ 160k 6 160k 5
VOUT
VOUT SOLENOID RELEASES SOLENOID PLUNGER PULLS IN
2.5V V+IN (10V/DIV)
VREF 0.1F
V+IN
1999 F07a
TIME (50ms/DIV)
1999 F07b
1999fa
19
LT1999-10/LT1999-20/ LT1999-50 TYPICAL APPLICATIONS
VS 5V 1 SOLENOID V+IN 2 V+ RSENSE V-IN ON OFF 0.1F
1999 F08a
LT1999 V+ SHDN
V+ 2A 8 RG
0.8k 0.8k
VOUT (0.5V/DIV)
3 5V 4
4k V+
Figure 8. Solenoid Current Monitor for Non-Grounded Solenoids. This Circuit Performs the Same Function as Figure 7 Except One End of the Solenoid Is Tied to VS. The Common Mode Voltage of Inputs of the LT1999 Switch Between Ground and One Diode Drop Above VS
20
+ -
4k
+ -
VSHDN
7 V+ 160k 160k 5
VOUT
VOUT SOLENOID RELEASES SOLENOID PLUNGER PULLS IN V+IN
2.5V V+IN (10V/DIV)
6 VREF 0.1F
TIME (50ms/DIV)
1999 F08b
1999fa
LT1999-10/LT1999-20/ LT1999-50 TYPICAL APPLICATIONS
5V V+ 1 SHDN 24V 2 C4 1000F VBRIDGE V+IN V-IN 3 4k 0.8k V+ 4k 0.8k LT1999-20 V+ 2A 8 10F
H-BRIDGE 5V
5V PWM INPUT OUTA OUTB BRAKE INPUT RSENSE 0.025 4
V+
PWM IN
DIRECTION
24V MOTOR
GND
Figure 9. Armature Current Monitor for DC Motor Applications
VOUT VOUT (2V/DIV)
2.5V V+IN (20V/DIV)
V+IN
TIME (20s/DIV)
1999 F10
Figure 10. LT1999 Output Waveforms for the Circuit of Figure 9
+ -
+ -
VSHDN 0.1F
80k
7 V+ 160k 160k 5 6
VOUT
VREF 0.1F
1999 F09
1999fa
21
LT1999-10/LT1999-20/ LT1999-50 PACKAGE DESCRIPTION
(Reference LTC DWG # 05-08-1660 Rev F)
3.00 0.102 (.118 .004) (NOTE 3) 0.52 (.0205) REF
MS8 Package 8-Lead Plastic MSOP
8
7 65
0.889 0.127 (.035 .005)
GAUGE PLANE
0.254 (.010)
DETAIL "A" 0 - 6 TYP
4.90 0.152 (.193 .006)
3.00 0.102 (.118 .004) (NOTE 4)
5.23 (.206) MIN
3.20 - 3.45 (.126 - .136)
DETAIL "A"
0.53 0.152 (.021 .006) 0.18 (.007)
SEATING PLANE
1 1.10 (.043) MAX
23
4 0.86 (.034) REF
0.42 0.038 (.0165 .0015) TYP
0.65 (.0256) BSC
RECOMMENDED SOLDER PAD LAYOUT
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.22 - 0.38 (.009 - .015) TYP
0.65 (.0256) BSC
0.1016 0.0508 (.004 .002)
MSOP (MS8) 0307 REV F
S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.045 .005
8 .189 - .197 (4.801 - 5.004) NOTE 3 7 6 5
.050 BSC
.245 MIN
.160 .005
.228 - .244 (5.791 - 6.197)
.150 - .157 (3.810 - 3.988) NOTE 3
.030 .005 TYP RECOMMENDED SOLDER PAD LAYOUT
.010 - .020 x 45 (0.254 - 0.508) .008 - .010 (0.203 - 0.254) .016 - .050 (0.406 - 1.270)
NOTE: 1. DIMENSIONS IN 0- 8 TYP
1
2
3
4
.053 - .069 (1.346 - 1.752)
.004 - .010 (0.101 - 0.254)
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.014 - .019 (0.355 - 0.483) TYP
.050 (1.270) BSC
SO8 0303
1999fa
22
LT1999-10/LT1999-20/ LT1999-50 REVISION HISTORY
REV A DATE 5/11 DESCRIPTION Revised +IN and -IN pin descriptions in Pin Functions section PAGE NUMBER 12
1999fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT1999-10/LT1999-20/ LT1999-50 TYPICAL APPLICATION
Battery Charge Current and Load Current Monitor VOUT = 0.25V/A, Maximum Measured Current 9.5A
CHARGER 0.025 BAT 42V LOAD 5V 1 V+ SHDN LT1999-10 V+ 2A 8 VSHDN 0.1F 0.1F 10F
5V
V
+
0.8k 0.8k
V-IN
3
4k
5V 4 0.1F
V+
RELATED PARTS
PART NUMBER LT1787/ LT1787HV LT6100 LTC6101/ LTC6101HV LTC6102/ LTC6102HV LTC6103 LTC6104 LT6106 LT6105 LTC4150 LT1990 LT1991 LT1637/LT1638 DESCRIPTION Precision, Bidirectional High Side Current Sense Amplifier Gain-Selectable High Side Current Sense Amplifier High Voltage High Side Current Sense Amplifier Zero Drift High Side Current Sense Amplifier Dual High Side Precision Current Sense Amplifier Bidirectional, High Side Current Sense Low Cost, High Side Precision Current Sense Amplifier Precision, Extended Input Range Current Sense Amplifier Coulomb Counter/Battery Gas Gauge Precision, 100A Gain Selectable Amplifier 250V Input Range Difference Amplifier 1.1/1.2MHz, 0.4V/s Over-The-Top, Rail-to-Rail Input and Output Amplifier COMMENTS 2.7V to 60V Operation, 75V Offset, 60A Current Draw 4.1V to 48V Operation, Pin-Selectable Gain: 10V/V, 12.5V/V, 20V/V, 25V/V, 40V/V, 50V/V 4V to 60V/5V to 100V Operation, External Resistor Set Gain, SOT23 4V to 60V/5V to 100V Operation, 10V Offset, 1s Step Response, MSOP8/DFN Packages 4V to 60V, Gain Configurable, 8-Pin MSOP Package 4V to 60V, Gain Configurable, 8-Pin MSOP Package 2.7V to 36V, Gain Configurable, SOT23 Package -0.3 to 44V, Gain Configurable, 8-Pin MSOP Package Indicates Charge Quantity and Polarity 2.7V to 36V Operation, CMRR > 70dB, Input Voltage = 250V 2.7V to 36V Operation, 50V Offset, CMRR > 75B, Input Voltage = 60V 0.4V/s Slew Rate, 230A per Amplifier
24 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 l FAX: (408) 434-0507
l
www.linear.com
+ -
V+IN
2
4k
+ -
40k 7 V+ 160k 160k 5 6 VREF VOUT
+
VOUT
+IN
VCC
VREF
CS SCK SDO
LTC2433-1 -IN
-
0.1F
1999 TA02
1999fa LT 0511 REV A * PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2010

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